Power Seminar

Staying updated on the latest technology is one of the many challenges engineers face today.  Join us this spring in the US and Asia for the eighth season of technical seminars.   These comprehensive one-day seminars offer rich technical and practical presentations  ideal for engineers looking for the latest advancements in power supply design.  Registration is free.

Register Now:   US   Taiwan   China

Agenda

8:00am – 9:00amRegistration and Continental Breakfast
9:00am – 12:00pmSeminar
12:00pm – 1:00pmLunch
1:00pm – 5:00pmSeminar

Topics

Current Shaping Strategies for Buck Power Factor Correction

Abstract — Two possible control techniques for a buck PFC converter are proposed, where the input current is indirectly shaped by shaping the inductor current. A thorough analysis on the harmonic content of the AC line current is presented for each control technique to examine the allowable voltage gain (K value) for meeting EN61000-3-2, Class C and D. Results of the harmonic analysis are used to derive the required value of K and therefore VOUT necessary to meet Class C and D requirements from a given AC line voltage. The goal of designing a buck PFC for highest efficiency, while passing EN61000-3-2, Class D is verified with a 300W dual interleaved boundary conduction mode buck PFC converter.

Driving HB-LEDs in High-Power Industrial Lighting Fixtures

Abstract — High-power, industrial Light Emitting Diode (LED) fixtures use series-parallel strings of High Brightness (HB) LEDs to produce superior lighting fixtures compared to traditional, “ballast-based” systems. HB-LEDs are configured in series or series-parallel strings and require Constant-Current, Constant-Voltage (CC-CV) power supplies typically operating within the range of 50W-200W. Voluntary and mandated industry requirements such as the need for Power Factor Correction (PFC), extended universal input voltage range, high efficiency, current accuracy, load control and dimming are all met with the usual challenges of reducing cost, size and design complexity. This paper will address some of the specific challenges designers face when considering power supply design solutions for these unique types of LED lighting applications.

LLC Resonant Converter: Design Issues and Solutions

Abstract — Recently, the LLC resonant converter has drawn a lot of attention due to its advantages over the conventional series resonant converter and parallel resonant converter: narrow frequency variation over wide load variation and Zero Voltage Switching (ZVS) of the switches for entire load range. However, there still remain several technical issues that make the design and optimization complicated, which prevents wider adoption of this topology in various applications. This paper highlights critical design issues of the LLC resonant converter and discusses potential solutions to solve these design issues.

Evolution in Packaging for Optimum Efficiency and Size in Low Voltage DC-DC Applications

Abstract — This paper focuses on the advantages of co-packaging two Power MOSFET die along with a gate driver IC die to form a low voltage, high current (60A) Multi-Chip module (MCM) synchronous buck power stage. It also provides a brief overview of the Low Voltage (< 30V) MCM evolution along with a discussion on why further advancements in packaging technologies are required to further improve performance. Dedicated sections will cover: package optimization, MOSFET optimization, and matching and optimizing the gate driver to the Power MOSFETs. Subsections will cover: controlling over-shoots and ringing, dead-time optimization, on-chip zero cross detect circuitry for accurate diode emulation, incorporating module fault features, and realizing advanced features such as accurate module temperature sensing.

Improve Flyback Design Performance with a Rapid Iteration Approach

Abstract — Capable design software enables an engineer to optimize a circuit by comparing the performance of many different design alternatives in a short time. A flyback converter is used as an example to illustrate how control response can be improved through rapid iteration, examining the loop gain that results from component-value changes much faster than is possible by most other design methods.  The starting point is a single-output off-line flyback converter designed automatically by Fairchild’s on-line design tool “Power Supply WebDesigner” (PSW) to meet a given specification. Control-loop compensation is explained briefly, then a sequence of design changes is made to improve efficiency and achieve the desired control response.

Meet the Authors

Author Hangseok ChoiHangseok Choi received B.S., M.S., and Ph.D degrees in electrical engineering from Seoul National University. From 2002 to 2007, he was a system and application engineer at Fairchild Semiconductor Korea. Since 2008, he has been a principal system and application engineer at Fairchild Semiconductor in Bedford, NH, USA, where he is developing high-performance power management ICs. He has authored or coauthored more than 50 technical papers and holds 27 U.S. patents. He has conducted Fairchild power seminars since 2007. His research interests include analysis, simulation, and design of high-frequency, high-power-density power converters.

 

Author Steve MappusSteve Mappus is a principal Systems Engineer working in Fairchild Semiconductor’s Power Conversion group located in Bedford, NH, USA. In his current role, he is responsible for new product development of power-supply control and MOSFET gate drive ICs. He has more than 22 years of power supply design experience, including ten years designing military and commercial power systems for avionic applications. He has spent the last twelve years working within the field of power-management semiconductors, specializing in systems and applications engineering. His areas of interest include high-power converter topologies, soft-switching converters, synchronous rectification, high-frequency power conversion, and power factor correction.

 

Author Jon GladishJon Gladish is a systems and applications engineer at Fairchild Semiconductor working on low-voltage Multi-Chip Module (MCM) development. Prior to Fairchild, Jon worked at Harris Semiconductor (Intersil) as an application engineer focusing on high-voltage IGBTs, MCTs, and diodes for AC-DC and DC-DC topologies. Jon's professional interests include high-performance MOSFETs and MCMs for low-voltage DC-DC converters.

 

Author Chung-Lin WuChung-Lin Wu is a package engineer at Fairchild Semiconductor working on LV MosFET, WLCSP, MCM, and MEMS package design. He received his Ph.D degree from Purdue University. Chung-Lin’s professional interests include developing new FEA simulation methodology to predict the electrical package thermal, electrical, and structural reliability performance.

 

Author Young-Sub JeongYoung-Sub Jeong is an applications engineer at Fairchild Semiconductor working on low-voltage MCM product development. Prior to working as an LV applications engineer, Young-Sub worked as an HV IC process design and applications engineer. Young-Sub’s professional interests focus on high-performance MCM solutions based on DC-DC module type converters.

 

Author Payton LinPayton Lin is an application engineer at Fairchild Semiconductor working on low-voltage MCM products. Payton worked at Delta Electronics and Inventec as a power engineer focusing on DC-DC power modules. Payton’s professional interests include developing high-performance DC-DC power solutions.

 

Author Jason GuoJason Guo is a Fairchild Semiconductor senior application engineer focusing on high-performance power conversion, web-based design tools, and tier-one customer support. He is based in San Jose, CA, USA. Prior to joining Fairchild, Jason worked at Semtech Corporation and Artesyn Technologies. Jason received a MS EE in power electronics from Virginia Tech.

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Dates & Locations

North America

Asia

5/15/2014
Taichung, Taiwan
Hotel name and address provided at time of registration.
5/20/2014
Beijing,
China
Hotel name and address provided at time of registration.
5/22/2014
Shenzhen, China
Hotel name and address provided at time of registration.
Engineering Energy Efficiency
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