Application Notes - Logic

Logic

Application Note	Product/Topic	Description - click on description below to view app note
AN-1065J	GTLP	GTLP: An Interface Technology for Bus and Backplane Applications (Japanese Translation)
AN-1065K	GTLP	GTLP: An Interface Technology for Bus and Backplane Applications (Korean Translation)
AN-1070K	GTLP	Fairchild's GTLP vs. TI's GTL: A Performance Comparison from a System Perspective (Korean Translation)
AN-1097J	GTLP	GTLP: Understanding Output Drive (Japanese Translation)
AN-1097K	GTLP	GTLP: Understanding Output Drive (Korean Translation)
AN-5006J	Bushold	Designing with Bushold (Japanese Translation)
AN-5006K	Bushold	Designing with Bushold (Korean Translation)
AN-310	CMOS	High Speed CMOS (MM74HC) Processing
AN-5004	aGeneral	Low Voltage Device Output Load Specifications, 30pF versus 50pF
AN-5005	aGeneral	PC100 Memory Driver Competitive Comparison
AN-5006	Bushold	Designing with Bushold
AN-5009	aGeneral	Fairchild's Logic Solutions for 133MHz Buffered Memory Modules
AN-5011	aGeneral	Low Voltage 3-STATE Power-Up and Power-Down Circuitry
AN-5013	GTLP	GTLP in BTL Applications
AN-5014	aGeneral	Incident Wave Switching and Throughput
AN-5016	aGeneral	Double Data Rate Support ICs
AN-5025	GTLP	Applications Using the GTLP10B320
AN-5029	LVDS	Interfacing Between PECL and LVDS Differential Technologies
AN-5031	GTLP	GTLP Power Configuration
AN-5045	LVDS	Using the VBB Reference on High Speed LVDS Repeaters
AN-5046	LVDS	LVDS Receiver Failsafe Biasing Networks
AN-5047	aGeneral	Live Insertion Using Low Voltage Differential Signaling
AN-5048	LVDS	System Clock Distribution Example Using LVDS
AN-5055	TinyLogic®	Portability and Ultra Low Power TinyLogic®
AN-682	aGeneral	Terminating F100K ECL Inputs
AN-753	aGeneral	Simple Byte Parity Applications Featuring the FAST 74F899
AN-88	CMOS	CMOS Linear Applications
AN-890	aGeneral	P1149.1A Extensions to IEEE-Std-1149.1-1990
AN-994	aGeneral	Simplified Intelligent Port Design Using the 74ACT1284
AN-1065SC	GTLP	GTLP: An Interface Technology for Bus and Backplane Applications (Chinese Translation)
AN-1070SC	GTLP	Fairchild's GTLP vs. TI's GTL: A Performance Comparison from a Systems Perspective (Chinese Translation)
AN-1072J	GTLP	GTLP Output Control Circuitry: Reduces Noise and Enhances System Performance (Japanese Translation)
AN-1097SC	GTLP	GTLP: Understanding Output Drive (Chinese Translation)
AN-5001J	LVX	Using Fairchild's LVX Low-Voltage Dual-Supply CMOS Translating Transceivers (Japanese Translation)
AN-5006SC	Bushold	Designing with Bushold (Chinese Translation)
AN-5011J	aGeneral	Low-Voltage 3-STATE Power-Up and Power-Down Circuitry (Japanese Translation)
AN-8030	TinyLogic®	TinyLogic® MicroPak2™ Package Applications Guide
AN-1065	GTLP	GTLP: An Interface Technology for Bus and Backplane Applications
AN-1070	GTLP	GTLP vs. GTL: A Performance Comparison from a System Perspective
AN-1072	GTLP	GTLP Output Control Circuitry: Reduces Noise and Enhances System Performance
AN-1097	GTLP	GTLP: Understanding Output Drive
AN-248	ElectroStatic Discharge	Electrostatic Discharge Prevention-Input Protection Circuits and Handling Guide for CMOS Devices
AN-376	CMOS	Logic-System Design Techniques Reduce Switching-CMOS Power
AN-476	ALS	Guide to ALS and AS
AN-5001	LVX	Using Fairchild's LVX Low Voltage Dual Supply CMOS Translating Transceivers
AN-5002	GTLP	GTLP: Single vs. Multiple Output Switching Technical Discussion
AN-600	CMOS	Understanding Latch-up in Advanced CMOS Logic
AN-610	CMOS	Terminations for Advanced CMOS Logic
AN-640	aGeneral	Understanding and Minimizing Ground Bounce
AN-680	CMOS	Dynamic Threshold for Advanced CMOS Logic
AN-683	aGeneral	300 MHz Dual Eight-Way Multiplexer/Demultiplexer
AN-684	aGeneral	100336 Four-Stage Counter/Shift Register
AN-690	CMOS	Design Innovations Address Advanced CMOS Logic Noise Considerations
AN-737	aGeneral	Device Generated Noise Measurement Techniques
AN-768	aGeneral	ECL Backplane Design
AN-780	aGeneral	Operating ECL from a Single Positive Supply
AN-784	aGeneral	F100K ECL Dual Rail Translators
AN-817	aGeneral	Taking Advantage of ECL Minimum-Skew Clock Drivers
AN-831	aGeneral	Characteristics and Measurement Techniques of the Spectral Content of Signals Generated by High-Performance ICs
AN-881	aGeneral	Design Considerations for Fault Tolerant Backplanes
AN-1037	aGeneral	Embedded IEEE1149.1 Test Application Example
AN-118	aGeneral	CMOS Oscillators
AN-138	Multivibrator	Using the CMOS Dual Monostable Multivibrator
AN-140	Schmitt trigger	CMOS Schmitt Trigger - A Uniquely Versatile Design Component
AN-303	aGeneral	HC-MOS Power Dissipation
AN-313	CMOS	DC Electrical Characteristics of MM74HC High Speed CMOS Logic
AN-314	CMOS	Interfacing to MM74HC High-Speed CMOS Logic
AN-317	CMOS	AC Characteristics of MM74HC High Speed CMOS
AN-319	aGeneral	Comparison of MM74HC to 74LS, 74S and 74ALS Logic
AN-339	CMOS	Fairchild's Process Enhancements Eliminate the CMOS SCR Latch-Up Problem in 74HC Logic
AN-340	aGeneral	HCMOS Crystal Oscillators
AN-363	TTL	Designing with TTL
AN-368	TTL	An Introduction to and Comparison of 74HCT TTL Compatible CMOS Logic
AN-375	CMOS	High-Speed-CMOS Designs Address Noise and I/O Levels
AN-377	CMOS	DC Noise Immunity of CMOS Logic Gates
AN-389	CMOS	Follow PC-Board Design Guidelines For Lowest CMOS EMI Radiation
AN-393	CMOS	Transmission-Line Effects Influence High-Speed CMOS
AN-661	aGeneral	FAST Design Considerations
AN-77	CMOS	CMOS, The Ideal Logic Family
AN-889	aGeneral	Design of a Parallel Bus-to-Scan Test Port Converter
AN-891	aGeneral	Non-Contact Test Access for Surface Mount Technology
AN-90	aGeneral	74C Family Characteristics
MS-506	GTLP	Extended Characterization Data for GTLP6C816
MS-508	GTLP	Extended Characterization Data for GTLP8T306
MS-533	GTLP	GTLP Extended Characterization Data - Description of Parameters
MS-548	GTLP	GTLP AC Loading Circuits and Waveforms
MS-550	GTLP	GTLP Product Feature Matrix
MS-551	aGeneral	Memory Module Support Products AC Loading and Waveforms
MS-553	LVDS	LVDS Product Feature Matrix
MS-555	aGeneral	Basic Analog and Digital Multiplexer Design Comparison
MS-561	aGeneral	Backplane Designer's Guide - Section 1 - Introduction
MS-562	aGeneral	Backplane Designer's Guide - Section 2 - Backplane Protocols
MS-563	aGeneral	Backplane Designer's Guide - Section 3 - Backplane Architecture
MS-564	aGeneral	Backplane Designer's Guide - Section 4 - Backplane Design Considerations
MS-565	aGeneral	Backplane Designer's Guide - Section 5 - Backplane Signal Conditioning
MS-566	aGeneral	Backplane Designer's Guide - Section 6 - Noise, Cross-talk, Jitter, Skew, and EMI
MS-567	aGeneral	Backplane Designer's Guide - Section 7 - Backplane Transceiver Technologies
MS-568	aGeneral	Backplane Designer's Guide - Section 8 - Mechanical Considerations
MS-569	aGeneral	Backplane Designer's Guide - Section 9 - Layout Considerations
MS-528	aGeneral	Zero-delay logic addresses PC design challenges
MS-529	aGeneral	Terminating buses in computer designs
MS-502	TinyLogic®	TinyLogic® Introduction
MS-503	TinyLogic®	Family Characteristics TinyLogic® HS/HST and UHS Series
MS-507	GTLP	Extended Characterization Data for GTLP16612, GTLP16616, GTLP16617
MS-509	aGeneral	Logic Quality and Reliability
MS-510	aGeneral	Interface Definition of Terms and Glossary
MS-511	aGeneral	AC/DC Family Characteristic Comparisons
MS-512	VHC	VHC/VHCT Introduction
MS-513	LCX	LCX Family Introduction
MS-515	VCX	VCX Family Introduction
MS-516	aGeneral	CROSSVOLT™ Low-Voltage Logic Introduction
MS-517	aGeneral	Fairchild's Logic Functional Cross-Reference Guide
MS-518	aGeneral	CROSSVOLT Family Characteristics
MS-519	aGeneral	Low Voltage Logic Ratings, Specifications and Wave Forms
MS-520	aGeneral	Logic Design Considerations
MS-521	VHC	VHC Description and Family Characteristics
MS-522	aGeneral	Logic and Switch Products Ordering Information
MS-525	Translator	Dual Supply Tranlator Family Introduction
MS-526	LVT	LVT Family Introduction
MS-527	aGeneral	Fairchild Electronic Device Models
MS-532	GTLP	GTLP Description and Family Characteristics
MS-539	aGeneral	FACT Design Considerations
MS-542	aGeneral	FACT Family Characteristics
MS-543	aGeneral	FACT Ratings, Specifications, and Waveforms
MS-545	TinyLogic®	TinyLogic® Ordering Information, Packaging and Physical Dimensions
MS-505	aGeneral	Logic Functional Selection Table