| General Information |
| Device Marking(TOP MARK) | $Y&Z&3&K
FGD
3N60LSD
| |
| Family Code | 0F3 | |
| Package Type | TO-252(DPAK) | |
| Package Description | 002, MOLDED PACKAGE, TO-252 2 LDS. SMD | |
| Pin Count | 2 | |
| Maximum Reflow Temperature | 260C | |
| MSL Rating | 1| | |
| Restriction of Hazardous Substance |
| Standard Plating Finish | Matte Sn | |
| Die Fabrication |
| Fabrication Process Identifier | SEE SPEC REV | |
| Package Assembly* |
| Plating Finish Layer Thickness | 8.0um - 13um | |
| Thermal Impedance (Theta JA) | 100 | °C/Watt |
| Thermal Impedance (Theta JC) | 3 | °C/Watt |
| Moisture Sensitivity | 1 | |