FJP5304DTU

NPN Triple Diffused Planar Silicon Transistor

Test Standards:

Attribute	Value	UOM
General Information
Device Marking(TOP MARK)	$Y &3&K J5304D
Family Code	0S3
Package Type	TO-220
Package Description	3 LD PLASTIC W/EXPOSED HEATSNK
Pin Count	3
FIT	11.5
Restriction of Hazardous Substance
Standard Plating Finish	Matte Sn
Die Fabrication
Fabrication Process Identifier	DI5304X
Package Assembly*
Plating Finish Layer Thickness	8.0um - 13um
Thermal Impedance (Theta JA)	999	°C/Watt
Thermal Impedance (Theta JC)	999	°C/Watt
Moisture Sensitivity	NA
Wire Material	AL
Wire Diameter	6.0 MIL

*If an attribute is listed twice, either can be used on the part.