Low-Skew Quad Clock Driver (ECL)
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General Description
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The 100315 contains four low skew differential drivers, designed for generation of multiple, minimum skew differential clocks from a single differential input. This device also has the capability to select a secondary single-ended clock source for use in lower frequency system level testing. The 100315 is a 300 Series redesign of the 100115 clock driver.
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Features
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Low output-to-output skew ( is less than or equal to 50 ps)
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Differential inputs and outputs
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Secondary clock available for system level testing
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2000V ESD protection
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Voltage compensated operating range: -4.2V to -5.7V
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Datasheet
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Product Status/Pricing/Packaging 
| 100315SC | Not recommended for new designs | RoHS Compliant | SOIC | 16 | RAIL
|  | Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K
Line 2: 100315
| | 100315SCX | Not recommended for new designs | RoHS Compliant | SOIC | 16 | TAPE REEL
|  | Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K
Line 2: 100315
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Qualification Support
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