The 100LVELT22 is a LVTTL/LVCMOS to differential LVPECL translator operating from a single +3.3V supply.

Both outputs of a differential pair should be terminated in 50ohm to V_CC - 2.0V even if only one output is being used. If an output pair is unused both outputs can be left open (un-terminated).

The 100 series is temperature compensated.

• Typical propagation delay of 350 ps
• <100 ps skew between outputs
• Max I_CC of 28 mA at 25°C
• When TTL input is left Open Q output defaults HIGH
• Fairchild MSOP-8 package is a drop-in replacement to ON TSSOP-8
• Flow through pinout
• Meets or exceeds JEDEC specification EIA/JESD78 IC latch-up test
• Moisture Sensitivity Level 1
• ESD Performance:

  Human Body Model > 2000V

  Machine Model > 200V