74ABT374

Octal D-Type Flip-Flop with 3-STATE Outputs

General DescriptionGeneral Description

The ABT374 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus-oriented applications. A buffered Clock (CP) and Output Enable (OE#) are common to all flip-flops.

Product Status/Pricing/PackagingProduct Status/Pricing/Packaging

ProductProduct statusEco StatusPricing*Package typeLeadsPacking methodPackage DrawingPackage Marking Convention**
74ABT374CMSANot recommended for new designsRoHS CompliantN/ASSOP20RAIL PDFLine 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: ABT Line 3: 374C
74ABT374CMSAXNot recommended for new designsRoHS CompliantN/ASSOP20TAPE REEL PDFLine 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: ABT Line 3: 374C
74ABT374CMTCFull ProductionRoHS Compliant$0.473TSSOP20RAIL PDFLine 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: ABT Line 3: 374
74ABT374CMTCXFull ProductionRoHS Compliant$0.473TSSOP20TAPE REEL PDFLine 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: ABT Line 3: 374
74ABT374CSCFull ProductionRoHS Compliant$0.60SOIC-Wide20RAIL PDFLine 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: 74ABT374C
74ABT374CSCXFull ProductionRoHS Compliant$0.60SOIC-Wide20TAPE REEL PDFLine 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: 74ABT374C
74ABT374CSJXNot recommended for new designsRoHS CompliantN/ASOP20TAPE REEL PDFLine 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: ABT374C

Related ProductsSupport

Related ProductsEngineering Connections

Qualification SupportQualification Support


FeaturesFeatures


  • Edge-triggered D-type inputs
  • Buffered positive edge-triggered clock
  • 3-STATE outputs for bus-oriented applications
  • Output sink capability of 64 mA, source capability of 32 mA
  • Guaranteed output skew
  • Guaranteed multiple output switching specifications
  • Output switching specified for both 50 pF and 250 pF loads
  • Guaranteed simultaneous switching, noise level and dynamic threshold performance
  • Guaranteed latchup protection
  • High impedance glitch free bus loading during entire power up and power down cycle
  • Non-destructive hot insertion capability

ModelsModels

For additional information please visit the Models page.

Package & leadsConditionTemperature rangeVcc rangeSoftware versionRevision date
HSPICE
SOIC-Wide-20Typical-55°C to 125°C4.5V to 5.5V97.4Oct 1, 1998
Fast-55°C to 125°C4.5V to 5.5V97.4Oct 1, 1998
Slow-55°C to 125°C4.5V to 5.5V97.4Oct 1, 1998

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