The AC648 consists of registered bus transceiver circuits, with outputs, D-type flip-flops and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin (CPAB or CPBA). The four fundamental data handling functions available are illustrated in Figure 1, Figure 2, Figure 3, and Figure 4.

• Independent registers for A and B buses
• Multiplexed real-time and stored data transfers
• 3-STATE outputs
• 300 mil slim dual-in-line package
• Outputs source/sink 24 mA
• Inverted data to output