The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE#) is LOW.

The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output. The CE# input must be stable only one setup time prior to the LOW-to-HIGH clock transition for predictable operation.

• Fairchild 1,000 piece Budgetary Pricing
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• Top mark packaging information for product 74ACT377 is available.

Product	Product status	Eco Status	Pricing*	Package type	Leads	Packing method	Package Drawing	Package Marking Convention**
74ACT377MTCX	Not recommended for new designs	RoHS Compliant	N/A	TSSOP	20	TAPE REEL		Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K Line 2: ACT377
74ACT377PC	Not recommended for new designs	RoHS Compliant	N/A	DIP	20	RAIL		Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &4 (4-Digit Date Code) &K Line 2: 74ACT377PC
74ACT377SC	Full Production	RoHS Compliant	$0.398	SOIC-Wide	20	RAIL		Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K Line 2: 74ACT377
74ACT377SCX	Full Production	RoHS Compliant	$0.398	SOIC-Wide	20	TAPE REEL		Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K Line 2: 74ACT377
74ACT377SJ	Full Production	RoHS Compliant	$0.55	SOP	20	RAIL		Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K Line 2: 74ACT377
74ACT377SJX	Full Production	RoHS Compliant	$0.51	SOP	20	TAPE REEL		Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K Line 2: 74ACT377