The LCX16240 contains sixteen inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.

The LCX16240 is designed for low voltage (2.5V or 3.3V) V_CC applications with capacity of interfacing to a 5V signal environment.

The LCX16240 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

• 5V tolerant inputs and outputs
• 2.3V to 3.6V V_CC specifications provided
• 4.5 ns t_PD max (V_CC = 3.3V), 20 µA I_CC max
• Power down high impedance inputs and outputs
• Supports live insertion/withdrawal (Note 1)
• ±24 mA output drive (V_CC = 3.0V)
• Implements patented noise/EMI reduction circuitry
• Latch-up performance exceeds 500 mA
• ESD performance:

  Human body model > 2000V

  Machine model > 200V