74VCX162373

The VCX162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE#) is LOW. When OE# is HIGH, the outputs are in a high impedance state.     The VCX162373 is also designed with 26ohm resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers and bus transceivers/transmitters.     The 74VCX162373 is designed for low voltage (1.4V to 3.6V) V_CC applications with I/O compatibility up to 3.6V.     The 74VCX162373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

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Product	Product Status	Eco Status	*Pricing	Package Type	Leads	Packing Method	Package Drawing	**Package Marking Convention	Qualification Support	RoHS IPC1752	RoHS/REACH/ JIG Certificate of Compliance
74VCX162373MTD	Full Production	Green as of May 2012	$1.54	TSSOP 48L	48	RAIL		Line 1:$Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K Line 2:VCX162373	FIT :  1.3   ESD (HBM) :  2000  V Moisture Sensitivity Level (MSL) :  2   Show more ... Max Reflow Temp :  260
74VCX162373MTDX	Full Production	Green as of May 2012	$1.24	TSSOP 48L	48	TAPE REEL		Line 1:$Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K Line 2:VCX162373	FIT :  1.3   ESD (HBM) :  2000  V Moisture Sensitivity Level (MSL) :  2   Show more ... Max Reflow Temp :  260