The VCXF162835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes.

Data flow is controlled by output-enable (OE#), latch-enable (LE), and clock (CLK) inputs. The device operates in Transparent Mode when LE is held HIGH. The device operates in clocked mode when LE is LOW and CLK is toggled. Data transfers from the Inputs (I_n) to Outputs (O_n) on a Positive Edge Transition of the Clock. When OE# is LOW, the output data is enabled. When OE# is HIGH the output port is in a high impedance state.

The VCXF162835 is designed with 26ohm series resistors in the outputs. This design reduces noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.

The 74VCXF162835 is designed for low voltage (1.65V to 3.6V) V_CC applications with I/O capability up to 3.6V.

The 74VCXF162835 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

• Compatible with PC133 DIMM module specifications
• 1.65V-3.6V V_CC specifications provided
• 3.6V tolerant outputs

• 26ohm series resistors in outputs

• t_PD (CLK to O_n) 3.2 ns max for 3.0V to 3.6V V_CC 4.1 ns max for 2.3V to 2.7V V_CC 7.4 ns max for 1.65V to 1.95V V_CC
• Power-down high impedance outputs
• Static Drive (I_OH/I_OL) ±12 mA @ 3.0V V_CC ±8 mA@ 2.3V V_CC ±3 mA@ 1.65V V_CC
• Latchup performance exceeds 300 mA
• ESD performance:

  Human body model > 2000V

  Machine model >200V