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3A DDR Bus Termination Regulator
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General Description
More DDR product information
The FAN1655 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It can both sink and source up to 2.1A continuous, 3A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = VREFOUT ± 40mV.
The FAN1655 includes a buffered reference voltage capable of supplying up to 5mA current. On-chip thermal limiting provides protection against a combination of power overload and ambient temperature that would create an excessive junction temperature. A shutdown input puts the FAN1655 into a low power mode.
The FAN1655 regulator is available in a power-enhanced eTSSOP™-16 package, standard SOIC-14, and an 8-Lead MLP package.
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Features
- Sinks and sources 2.1A continuous, 3A peak
- 0 to +125°C operating temperature range
- 5mA Buffered VREFOUT = VDDQ/2
- Load regulation: VTT = VREFOUT ± 40mV
- On-chip thermal limiting
- Low Cost SO-14, Power Enhanced eTSSOP or 8-pin 5x6mm MLP packages
- Low-Current Shutdown Mode
- Output Short Circuit Protection
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Applications
- DDR Terminator VTT supply
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