This N-Channel logic level enhancement mode field effect transistor is produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors. Since bias resistors are not required, this one N-channel FET can replace several different digital transistors, with different bias resistor values.

• 25 V, 0.22 A continuous, 0.5 A Peak. RDS(ON) = 5 W @ VGS= 2.7 V, RDS(ON) = 4 W @ VGS= 4.5 V.
• Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.5V.
• Gate-Source Zener for ESD ruggedness. >6kV Human Body Model.
• Replace multiple NPN digital transistors with one DMOS FET.