This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra-low power dissipation even at high frequencies. This device is ideal for high-speed transfer of clock or data.

The FIN1017 can be paired with its companion receiver, the FIN1018, or with any other LVDS receiver.

• Greater than 600Mbs Data Rate
• 3.3V Power Supply Operation
• 0.5ns Maximum Differential Pulse Skew
• 1.5ns Maximum Propagation Delay
• Low Power Dissipation
• Power-Off Protection
• Meets or Exceeds the TIA/EIA-644 LVDS Standard
• Flow-Through Pinout Simplifies PCB Layout
• 8-Lead SOIC and US8 Packages Save Space