This dual driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock or data.

The FIN1027 or FIN1027A can be paired with its companion receiver, the FIN1028, or with any other LVDS receiver.

• Greater than 600Mbs data rate
• 3.3V power supply operation
• 0.5ns maximum differential pulse skew
• 1.5ns maximum propagation delay
• Low power dissipation
• Power-Off protection
• Meets or exceeds the TIA/EIA-644 LVDS standard
• Flow-through pinout simplifies PCB layout
• 8-Lead SOIC, US8, and 8-terminal MLP packages save space