FIN1028

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3.3V LVDS 2-Bit High Speed Differential Receiver

General Description

This dual receiver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra-low power dissipation, even at high frequencies. This device is ideal for high-speed transfer of clock and data signals. The FIN1028 can be paired with its companion driver, the FIN1027, or any other LVDS driver.

Product Status/Pricing/Packing

Product Product Status Eco Status *Pricing Package Type Leads Packing Method Package Drawing **Package Marking Convention RoHS IPC1752 RoHS/REACH/JIG Certificate of Compliance
FIN1028M Full Production Green as of Dec 2008 $0.7 SO-8 8 RAIL PDF Line 1:$Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code) &K
Line 2:FIN
Line 3:1028
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FIN1028MX Full Production Green as of Dec 2008 $0.7 SO-8 8 TAPE REEL PDF Line 1:$Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code) &K
Line 2:FIN
Line 3:1028
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Features

  • Greater than 400Mbs data rate
  • 3.3V power supply operation
  • 0.4ns maximum differential pulse skew
  • 2.5ns maximum propagation delay
  • Low power dissipation
  • Power-Off protection
  • Fail safe protection for open-circuit, shorted and terminated conditions
  • Meets or exceeds the TIA/EIA-644 LVDS standard
  • Flow-through pinout simplifies PCB layout

Applications

  • Media Tablets
  • Mobile Handsets
  • PMP/MP3 Players
  • Storage & Peripherals
  • Wireless LAN Card & Broadband Access

Models

For additional information please visit the Models page .

Package & leads Condition Temperature range Vcc range Software version Revision date
IBIS
SO-8-8 All -40°C to 85°C 3V to 3.6V 3.2 Apr 26, 2011
HSPICE
SO-8-8 Typical -40°C to 85°C 3V to 3.6V 99.4 Apr 26, 2011
Slow -40°C to 85°C 3V to 3.6V 99.4 Apr 26, 2011
Fast -40°C to 85°C 3V to 3.6V 99.4 Apr 26, 2011
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