FIN3385

The FIN3385 and FIN3383 transform 28-bit wide parallel LVTTL (Low Voltage TTL) data into 4 serial LVDS (Low-Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock 28 bits of input LVTTL data are sampled and transmitted. The FIN3386 and FIN3384 receive and convert the 4/3 serial LVDS data streams back into 28/21 bits of LVTTL data. Refer to Table 1 for a matrix summary of the serializers and deserializers available. For the FIN3385, at a transmit clock frequency of 85MHz, 28-bits of LVTTL data are transmitted at a rate of 595Mbps per LVDS channel. These chipsets solve EMI and cable size problems associated with wide and high-speed TTL interfaces.

• Fairchild 1,000 piece Budgetary Pricing. *
• If there is no sample button displayed at the top of the page, please contact one of the Fairchild distributors or your local sales office to obtain samples.
• Top mark packaging information for product FIN3385 is available. **

Product	Product Status	Eco Status	*Pricing	Package Type	Leads	Packing Method	Package Drawing	**Package Marking Convention	RoHS IPC1752	RoHS/REACH/JIG Certificate of Compliance
FIN3385MTDX	Full Production	ROHS Compliant	$2.1	TSSOP	56	TAPE REEL		Line 1:$Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K Line 2:FIN3385