GTLP16612 − CMOS 18-Bit TTL/GTLP Universal Bus Transceiver

The GTLP16612 is an 18-bit universal bus transceiver which provides TTL to GTLP signal level translation. The device is designed to provide a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels. High speed backplane operation is a direct result of GTLP's reduced output swing (<1V), reduced input threshold levels and output edge rate control which minimizes signal settling times. GTLP is a Fairchild Semiconductor derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD8-3.     Fairchild's GTLP has internal edge-rate control and is Process, Voltage, and Temperature (PVT) compensated. Its function is similar to BTL or GTL but with different driver output levels and receiver threshold. GTLP output low voltage is typically less than 0.5V, the output high is 1.5V and the receiver threshold is 1.0V.

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Product Status/Pricing/Packaging

Product Product & Eco Status *Pricing Packaging & Packing Info **Package Marking Convention Qualification Support Compliance Certificates
0 GTLP16612MTD Last time buys being accepted until 10-Jun-2013 as of 11-Dec-2012
Green as of May 2012
$5.8 TSSOP 56L Details RAIL Line 1:$Y (Fairchild logo)
&Z (Plant Code)
&2 (2-Digit Date Code) &K
Line 2:GTLP16612
FIT :  0.9  
ESD (HBM) :  2000  V
Moisture Sensitivity Level (MSL) :  2  
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0 GTLP16612MTDX Last time buys being accepted until 10-Jun-2013 as of 11-Dec-2012
Green as of May 2012
$5.8 TSSOP 56L Details TAPE REEL Line 1:$Y (Fairchild logo)
&Z (Plant Code)
&2 (2-Digit Date Code) &K
Line 2:GTLP16612
FIT :  0.9  
ESD (HBM) :  2000  V
Moisture Sensitivity Level (MSL) :  2  
Show more...

Features

  • Bidirectional interface between GTLP and TTL logic levels
  • Designed with an edge rate control circuit to reduce output noise on GTLP port
  • VREF pin provides external supply reference voltage for receiver threshold adjustability
  • Special PVT compensation circuitry to provide consistent performance over variations of process, supply voltage and temperature
  • TTL compatible Driver and Control inputs
  • Designed using Fairchild advanced CMOS technology
  • Bushold data inputs on A port to eliminate the need for external pull-up resistors for unused inputs
  • Power up/down and power off high impedance for live insertion
  • 5V tolerant inputs and outputs on LVTTL port
  • Open drain on GTLP to support wired-or connection
  • Flow-through pinout optimizes PCB layout
  • D-type flip-flop, latch and transparent data paths
  • A Port outputs source/sink -32 mA/+32 mA

Applications

  • Server & Mainframe
  • Workstation
  • Desktop PC
  • Notebook PC
  • PC Server
  • Media Tablets
  • Storage & Peripherals
  • Printer
  • Graphic Card
  • LCD Monitor
  • CRT/RPTV
  • Other Data Processing
  • Routers & LAN Switches
  • SAN
  • Long-haul & Metro
  • Broadband Access
  • Broadband Modem
  • Enterprise Voice Network
  • Central Office
  • Broadcast & Studio
  • Other Wired Communications
  • Mobile Handsets
  • Wireless LAN Card & Broadband Access
  • Wireless LAN Access Point/Router
  • Mobile Comm Infrastructure
  • Other Wireless Communications
  • PMP/MP3 Players
  • Home Audio System Components
  • CRT/RPTV
  • LCD TV
  • PDP TV
  • Camcorder
  • DVD
  • Set Top Boxes
  • DSC
  • Video Game Console
  • E-book Reader
  • Consumer Appliances
  • Other Audio & Video
  • Other Consumer Electronics
  • Medical Electronics/Devices
  • Automation
  • Test and Measurement
  • Building & Home Control
  • Other Industrial

Application Notes

Application Note Description
AN-600 Understanding Latch-up in Advanced CMOS Logic(54 K) 05-Mar-2011
AN-1065K GTLP: An Interface Technology for Bus and Backplane Applications (Korean Translation)(235 K) 05-Mar-2011
AN-1065SC GTLP: An Interface Technology for Bus and Backplane Applications (Chinese Translation)(289 K) 05-Mar-2011
AN-1070 GTLP vs. GTL: A Performance Comparison from a System Perspective(114 K) 16-Apr-2013
AN-1070K Fairchilds GTLP vs. TIs GTL: A Performance Comparison from a System Perspective (Korean Translation)(538 K) 05-Mar-2011
AN-1070SC Fairchilds GTLP vs. TIs GTL: A Performance Comparison from a Systems Perspective (Chinese Translation)(610 K) 05-Mar-2011
AN-1072 GTLP Output Control Circuitry: Reduces Noise and Enhances System Performance(85 K) 16-Apr-2013
AN-5002 GTLP: Single vs. Multiple Output Switching Technical Discussion(39 K) 05-Mar-2011
AN-375 High-Speed-CMOS Designs Address Noise and I/O Levels(238 K) 05-Mar-2011
AN-1072J GTLP Output Control Circuitry: Reduces Noise and Enhances System Performance (Japanese Translation)(426 K) 05-Mar-2011
AN-1065 GTLP: An Interface Technology for Bus and Backplane Applications(99 K) 15-Apr-2013
AN-363 Designing with TTL(32 K) 05-Mar-2011
AN-1097SC GTLP: Understanding Output Drive (Chinese Translation)(284 K) 05-Mar-2011
AN-1097 GTLP: Understanding Output Drive(48 K) 16-Apr-2013
AN-1065J GTLP: An Interface Technology for Bus and Backplane Applications (Japanese Translation)(339 K) 05-Mar-2011
AN-368 An Introduction to and Comparison of 74HCT TTL Compatible CMOS Logic(85 K) 05-Mar-2011
AN-1097K GTLP: Understanding Output Drive (Korean Translation)(233 K) 05-Mar-2011
AN-5025 Applications Using the GTLP10B320(387 K) 05-Mar-2011
AN-5013 GTLP in BTL Applications(56 K) 05-Mar-2011
AN-5031 GTLP Power Configuration(1,206 K) 05-Mar-2011
AN-1097J GTLP: Understanding Output Drive (Japanese Translation)(336 K) 05-Mar-2011

Models

For additional information please visit the Models page.

Package Condition Temperature Range Vcc Range Software Version Revision Date
IBIS
TSSOP 56L Electrical;Fast;Slow;Thermal;Typical -40°C to 85°C 3V to 3.6V 2.1 Feb 28, 2012
HSPICE
TSSOP 56L Typical -40°C to 85°C 3.15V to 3.45V 97.1 Feb 28, 2012
Slow -40°C to 85°C 3.15V to 3.45V 97.1 Feb 28, 2012
Fast -40°C to 85°C 3.15V to 3.45V 97.1 Feb 28, 2012


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