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P-Channel Logic Level Enhancement Mode Field Effect Transistor Recommend FDN352AP
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General Description
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SuperSOT™-3 P-Channel logic level enhancement mode
power field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance. These devices are particularly suited for low voltage
applications such as notebook computer power management,
portable electronics, and other battery powered circuits where
fast high-side switching, and low in-line power loss are
needed in a very small outline surface mount package.
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Features
-1.1 A, -30 V, RDS(ON) = 0.3 W Ω VGS=-4.5 V
RDS(ON) = 0.2 W Ω VGS=-10 V
Industry standard outline SOT-23 surface mount package
using proprietary SuperSOT™-3 design for superior
thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
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Datasheet
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Product Status/Pricing/Packaging
| NDS356AP | Not recommended for new designs | RoHS Compliant | SuperSOT | 3 | TAPE REEL
| | Line 1: &E&Y (Binary Calendar Year Coding)
Line 2: 356A
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Models
| SuperSOT-3 | Electrical | 25°C to 125°C | Orcad 9.1 | Mar 19, 2001 |
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Qualification Support
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Eco Status