The 100LVEL16 is a low voltage differential receiver that contains an internally supplied voltage source, V_BB. When used in a single ended input condition the unused input must be tied to V_BB. When operating in this mode use a 0.01 µF capacitor to decouple V_BB and V_CC and also limit the current sinking or sourcing capability to 0.5mA. When V_BB is not used it should be left open.

With inputs open the differential Q outputs default LOW and Q# outputs default HIGH.

The 100 series is temperature compensated.

• Typical propagation delay of 300 ps
• Typical I_EE of 17 mA
• Internal pull-down resistors on D
• Fairchild MSOP-8 package is a drop-in replacement to ON TSSOP-8
• Meets or exceeds JEDEC specification EIA/JESD78 IC latch-up test
• Moisture Sensitivity Level 1
• ESD Performance:

  Human Body Model > 2000V

  Machine Model > 150V