The ALVC162839 contains twenty non-inverting selectable buffered or registered paths. The device can be configured to operate in a registered, or flow through buffer mode by utilizing the register enable (REGE) and Clock (CLK) signals. The device operates in a 20-bit word wide mode. All outputs can be placed into 3-STATE through use of the OE# pin. These devices are ideally suited for buffered or registered 168 pin and 200 pin SDRAM DIMM memory modules.

The 74ALVC162839 is designed for low voltage (1.65V to 3.6V) V_CC applications with I/O compatibility up to 3.6V. The 74ALVC162839 is also designed with 26ohm series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters.

The 74ALVC162839 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

• Compatible with PC100 and PC133 DIMM module specifications
• 1.65V-3.6V V_CC supply operation
• 3.6V tolerant inputs and outputs
• 26ohm series resistors in the outputs
• t_PD (CLK to O_n)

  4.6 ns max for 3.0V to 3.6V V_CC

  6.3 ns max for 2.3V to 2.7V V_CC

  9.8 ns max for 1.65V to 1.95V V_CC

• Power-off high impedance inputs and outputs
• Supports live insertion and withdrawal (Note 1)
• Uses patented noise/EMI reduction circuitry
• Latchup conforms to JEDEC JED78
• ESD performance:

  Human body model > 2000V

  Machine model > 200V