The ALVCH16244 contains sixteen non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.

The ALVCH16244 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.

The 74ALVCH16244 is designed for low voltage (1.65V to 3.6V) V_CC applications with output capability up to 3.6V.

The 74ALVCH16244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

• 1.65V to 3.6V V_CC supply operation
• 3.6V tolerant control inputs and outputs
• Bushold on data inputs eliminating the need for external pull-up/pull-down resistors
• t_PD

  3 ns max for 3.0V to 3.6V V_CC

  3.7 ns max for 2.3V to 2.7V V_CC

  6.0 ns max for 1.65V to 1.95V V_CC

• Uses patented noise/EMI reduction circuitry
• Latch-up conforms to JEDEC JED78
• ESD performance:

  Human body model > 2000V

  Machine model > 200V