These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction is controlled by output-enable (OEAB and OEBA#), latch-enable (LEAB and LEBA), and clock (CLKAB# and CLKBA#) inputs.

The LCX16500 is designed for low voltage (2.5V or 3.3V) V_CC applications with the capability of interfacing to a 5V signal environment.

The LCX16500 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power.

• 5V tolerant inputs and outputs
• 2.3V-3.6V V_CC specifications provided
• 6.0 ns t_PD max (V_CC = 3.3V), 20 µA I_CC max
• Power down high impedance inputs and outputs
• Supports live insertion/withdrawal (Note 1)
• ±24 mA output drive (V_CC = 3.0V)
• Uses patented noise/EMI reduction circuitry
• Latch-up performance exceeds 500 mA
• ESD performance:

  Human body model > 2000V

  Machine model > 200V

• Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA)