The VCX16240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.

The 74VCX16240 is designed for low voltage (1.2V to 3.6V) V_CC applications with I/O capability up to 3.6V.

The 74VCX16240 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

• 1.2V to 3.6V V_CC supply operation
• 3.6V tolerant inputs and outputs
• t_PD

  2.5 ns max for 3.0V to 3.6V V_CC

• Power-off high impedance inputs and outputs
• Supports live insertion and withdrawal (Note 1)
• Static Drive (I_OH/I_OL)

  ±24 mA @ 3.0V V_CC

• Uses patented noise/EMI reduction circuitry
• Latch-up performance exceeds 300 mA
• ESD performance:

  Human body model > 2000V

  Machine model > 200V