The VCXH162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE#) is LOW. When OE# is HIGH, the outputs are in a high impedance state.

The VCXH162373 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.

The VCXH162373 is also designed with 26ohm series resistors in the outputs. This design reduces line noise in applications such as memory address driver, clock drivers and bus transceivers/transmitters.

The 74VCXH162373 is designed for low voltage (1.4V to 3.6V) V_CC applications with output compatibility up to 3.6V.

The 74VCXH162373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

• 1.4V to 3.6V V_CC supply operation
• 3.6V tolerant control inputs and outputs
• Bushold on data inputs eliminates the need for external pull-up/pull-down resistors
• 26ohm series resistors in outputs
• t_PD (I_n to O_n)

  3.3 ns max for 3.0V to 3.6V V_CC

• Static Drive (I_OH/I_OL)

  ±12 mA @ 3.0V V_CC

• Uses patented noise/EMI reduction circuitry
• Latch-up performance exceeds 300 mA
• ESD performance:

  Human body model > 2000V

  Machine model > 200V