3.3V LVDS 2-Bit High Speed Differential Receiver
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General Description
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This dual receiver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra-low power dissipation, even at high frequencies. This device is ideal for high-speed transfer of clock and data signals.
The FIN1028 can be paired with its companion driver, the FIN1027, or any other LVDS driver.
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Features
- Greater than 400Mbs Data Rate
- Power Supply Operation: 3.3V
- Maximum Differential Pulse Skew: 0.4ns
- Maximum Propagation Delay: 2.5ns
- Low-Power Dissipation
- Power-Off Protection
- Fail-Safe Protection for Open-Circuit, Shorted, and Terminated Conditions
- Meets or Exceeds the TIA/EIA-644 LVDS Standard
- Flow-through Pinout Simplifies PCB Layout
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Product Status/Pricing/Packaging 
| FIN1028M | Full Production | Green | $0.64 | SOIC | 8 | RAIL
|  | Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K
Line 2: FIN
Line 3: 1028
| | FIN1028MX | Full Production | Green | $0.64 | SOIC | 8 | TAPE REEL
|  | Line 1: $Y (Fairchild logo) &Z (Asm. Plant Code) &2 (2-Digit Date Code) &K
Line 2: FIN
Line 3: 1028
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* Fairchild 1,000 piece Budgetary Pricing
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| ** A sample button will appear if the part is available through Fairchild's on-line samples program. If there is no sample button, please contact a Fairchild distributor to obtain samples |
Models
| SOIC-8 | Typical | -40°C to 85°C | 3V to 3.6V | 99.4 | Feb 12, 2001 | | Slow | -40°C to 85°C | 3V to 3.6V | 99.4 | Feb 12, 2001 | | Fast | -40°C to 85°C | 3V to 3.6V | 99.4 | Feb 12, 2001 | | SOIC-8 | All | -40°C to 85°C | 3V to 3.6V | 3.2 | Jul 1, 2001 |
Qualification Support
Click on a product for detailed qualification data
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