Creating Accurate LVDS IBIS Models

By Adam Tambone
Fairchild Semiconductor
Interface and Logic Modeling Group

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Introduction
IBIS (I/O Buffer Information Specification) models have become a key signal integrity simulation tool as more designers prefer the easy access to and simplicity of these models. IBIS models are often used in place of SPICE models because they are easier to transport, are several orders of magnitude faster to run and because IC vendors are more willing to release IBIS models of their devices, as they do not reveal proprietary information. In addition, simulations with IBIS models are more likely to converge than simulations with SPICE models.

However, when created with standard methods, IBIS models for simulating Low Voltage Differential Signaling (LVDS) drivers are frustratingly inaccurate and unreliable predictors of circuit performance. This is because IBIS does not contain a true differential buffer model type. As system designers have begun turning to differential I/O to meet higher throughput requirements, this has sparked a demand for LVDS IBIS models that will perform reliably in system-level simulations for signal integrity.

A new methodology has been found for creating accurate LVDS IBIS models primarily by employing a dependent voltage source while obtaining the DC and transient data that defines an IBIS model.

Described simply, an IBIS model is a collection of DC (current vs.voltage) and transient (voltage vs. time) data taken from the device being modeled. This data can be collected through either laboratory measurement or by simulation of the SPICE model representing the device. Once created, the IBIS model can then be used by EDA tools to create a behavioral model of that device. The behavioral modeling process is proprietary to the EDA tool, and is based on the information contained in the IBIS model itself. In this sense, an IBIS model can be more accurately described as an IBIS datasheet.

For this example, SPICE to IBIS translation will be the method described for generating LVDS IBIS models as the empirical method is often costly and time consuming. SPICE to IBIS translation is the preferred method for model creation because it is faster and more accurately represents process variations (cross temperature, typical, slow and fast).

To model an output buffer within IBIS, the DC and transient data should include a pull-up curve, pull-down curve, rising waveforms, and falling waveforms. Once this data is collected through SPICE simulation, it will be formatted and included in the IBIS model representing the output buffer being modeled.

The pull-up and pull-down curves are defined by the I/V characteristics of the output buffer when it is fully in the logic high state, and logic low state, respectively. During simulation, the device is driven to both of these states and a DC voltage source on the output node of the device is then swept from -V_cc to 2V_cc in each case. For each incremental voltage step the corresponding current at the output is measured, thereby obtaining a current vs. voltage curve representing the I/V characteristics of the device when it is in either state. Combined, this DC data will define the DC output levels of current and voltage of the output buffer being modeled as well as model the nonlinear output resistance characteristics of the device.

The rising and falling waveform data describe the V/t characteristics of the output buffer. A ramped input stimulus is used to drive the output to a logic high for the rising waveforms and to a logic low for falling waveforms. In each case, voltage vs. time data is gathered. Collectively, these waveforms model the shape of the rising and falling edges over a range of conditions in simulation. The output voltage levels defined in the transient data should also correlate to the output voltage levels as defined in the DC data.

These standard methods of obtaining IBIS data work well when modeling a driver device with independent outputs. For example, a single-ended TTL output buffer drives a signal with one output, but the LVDS driver has two outputs -- inverting and noninverting -- driving two signals which are dependent upon one another and collectively act as one.

In the LVDS device, the inverting and noninverting outputs will always attempt to maintain a constant voltage of 2V_OS between the outputs as the output voltages vary. Typically, V_OS is 1.25V. For example, when the noninverting output of an LVDS device has an output voltage of 1.50V, then, through compensation by the internal circuitry, the voltage at the inverting output will attempt to reach 1.00V so that the sum of voltages between the outputs is equal to 2V_OS or 2.50V.

Since the I/V and V/t characteristics of the inverting and non-inverting outputs of the LVDS driver are dependent upon each other, data from one output must be gained in a way that accounts for the opposite output. Standard IBIS methods previously described do not account for this interdependence. It is therefore necessary to establish an alternative method to gain the I/V and V/t data of these outputs.

This can be accomplished with the use of a dependent voltage source designed to be a function of the DC voltage source being swept on either output of the LVDS device being modeled. For example, to gain data for the noninverting output buffer of the LVDS device, a dependent voltage should be placed on the output of the inverting output buffer so that a constant voltage equal to 2V_OS can be maintained between the inverting and noninverting outputs.

Designing and instantiating a dependent voltage source can be readily accomplished in HSPICE by utilizing the polynomial voltage controlled voltage source. Dependent voltage sources can be implemented in most EDA tools.

As described, the purpose of implementing a dependent voltage source is to maintain constant voltage equal to 2V_OS between the outputs. We can derive our polynomial from this expression

where V_OUT1 and V_OUT2 are the output voltages of the non-inverting and inverting outputs respectively. Solving for either V_OUT1 or V_OUT2 will define the dependent one-dimensional polynomial voltage source needed.

Therefore, once solved for we would like our polynomial to be the following

where V_OUT2 is now the dependent voltage source being swept in conjunction with the DC voltage sweep on the output buffer being modeled. In other words, the dependent voltage source will always be equal to the negative value of V_OUT1 being swept plus 2.50V. In this way, a constant voltage of 2.50V is maintained between the outputs of the LVDS driver as the DC voltage sweep is performed.

Below is HSPICE syntax for the voltage controlled voltage sources for use on inverting and non-inverting outputs of a LVDS driver. For obtaining data from the non-inverting output place the following dependent source on the inverting output.

EV2 DON GND POLY(1) DOP GND 2.5 -1

For obtaining data from the inverting output place the following dependent source on the non-inverting output.

EV2 DOP GND POLY(1) DON GND 2.5 -1

In theory, if one is generating IBIS models by obtaining data from HSPICE simulation, then, at best the IBIS model can only be as accurate as the source HSPICE model itself. For this reason, the verification of the LVDS IBIS model as being accurate will be determined by how well it correlates to the source LVDS HSPICE model it was derived from. Transient analysis within HSPICE of both the LVDS HSPICE and LVDS IBIS models is conducted under identical conditions to see how well the LVDS IBIS model correlates to the source HSPICE model. The figures display transient simulation results of LVDS IBIS models created with both the standard and non-standard methods to show the accuracy of the non-standard methods.

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